1. The 7447A is a BCD-to-7-segment decoder with ripple blanking input and output functions. The purpose of these lines is to .
Correct : A. turn off the display for any nonsignificant digit
2. One reason for using the sum-of-products form is that it can be implemented using all gates without much difficulty.
Correct : B. nand
3. When an open occurs on the input of a CMOS gate, the output will .
Correct : D. be unpredicta ble; it may go high or low
4. To subtract a signed number (the subtrahend) from another signed number (the minuend) in the 2's complement system, the minuend is
.
Correct : D. never compleme nted
5. In an odd-parity system, the data that will produce a parity bit = 1 is
.
Correct : D. all of the above
6. The addition of two signed numbers in the 2's complement system can cause overflow. For overflow to occur both numbers must .
Correct : C. have the same sign
7. A Karnaugh map will .
Correct : A. eliminate the need for tedious boolean simplifications
8. An 8-bit binary number is input to an odd parity generator. The parity bit will equal 1 only if .
Correct : D. the number of 1s in the number is even
9. Two 4-bit comparators are cascaded to form an 8-bit comparator. The cascading inputs of the most significant 4 bits should be connected
.
Correct : A. to the outputs from the least significant 4- bit comparator
10. When Karnaugh mapping, we must be sure to use the number of loops.
Correct : B. minimum
11. The final output of a POS circuit is generated by .
Correct : A. an and
12. After each circuit in a subsection of a VHDL program has been , they can be combined and the subsection can be tested.
Correct : B. tested
13. The series of IC's are pin, function, and voltage-level compatible with the 74 series IC's.
Correct : C. hct
14. The circuit produces a HIGH output whenever the two inputs are equal.
Correct : C. exclusive- nor
15. A 4-bit adder has the following inputs: C0 = 0, A1 = 0, A2 = 1, A3 = 0, A4 = 1, B1 = 0, B2 = 1, B3 = 1, B4 = 1. The output will be .
Correct : C. 11000
16. The statement evaluates the variable status.
Correct : A. if/then
17. In VHDL, data can be each of the following types except .
Correct : D. std_vect or
18. When grouping cells within a K-map, the cells must be combined in groups of .
Correct : B. 1, 2, 4, 8, etc.
19. The circuit produces a HIGH output whenever the two inputs are unequal.
Correct : C. exclusive-or
20. Occasionally, a particular logic expression will be of no consequence in the operation of a circuit, such as in a BCD-to-decimal converter. These result in terms in the K-map and can be treated as either or , in order to the resulting term.
Correct : A. don\t care, 1\s, 0\s, simplify
21. A good rule of thumb for determining the pin numbers of dual-in-line package IC chips would be to place the notch to your right and pin #1 will always be in the lower right corner.
Correct : B. false
22. The carry output of each adder in a ripple adder provides an additional sum output bit.
Correct : A. true
23. Truth tables are great for listing all possible combinations of independent variables.
Correct : A. true
24. A square in the top row of a K-map is considered to be adjacent to its corresponding square in the bottom row.
Correct : A. true
25. To implement the full-adder sum functions, two exclusive-OR gates can be used.
Correct : A. true
26. The input at the 1, 2, 4, 8 inputs to a 4-line to 16-line decoder with active- low outputs is 1110. As a result, output line 7 is driven LOW.
Correct : B. false
27. When decisions demand two possible actions, the IF/THEN/ELSE control structure is used.
Correct : A. true
28. TTL stands for transistor-technology-logic.
Correct : B. false
29. The 54 prefix on ICs indicates a broader operating temperature range, generally intended for military use.
Correct : A. true
30. This is an example of a POS expression:
Correct : A. true
31. The abbreviation for an exclusive-OR gate is XOR.
Correct : A. true
32. In an even-parity system, the parity bit is adjusted to make an even number of one bits.
Correct : A. true
33. In an even-parity system, the following data will produce a parity bit = 1. data = 1010011
Correct : B. false
34. The following combination is correct for an ODD parity data transmission system: data = 011011100 and parity = 0
Correct : A. true
35. The XOR gate will produce a HIGH output if only one but not both of the inputs is HIGH.
Correct : A. true
36. When decisions demand one of many possible actions, the ELSIF control structure is used.
Correct : A. true
37. The K-map provides a "graphical" approach to simplifying sum-of- products expressions.
Correct : A. true
38. Even parity is the condition of having an even number of 1s in every group of bits.
Correct : A. true
39. The look-ahead carry method suffers from propagation delays.
Correct : B. false
40. A pull-up resistor is a resistor used to keep a given point in a circuit HIGH when in the active state.
Correct : A. true
41. A data selector is also called a demultiplexer.
Correct : B. false
42. A digital circuit that converts coded information into a familiar or non- coded form is known as an encoder.
Correct : B. false
43. An exclusive-OR gate will invert a signal on one input if the other is always HIGH.
Correct : A. true
44. The following combination is correct for an EVEN parity data transmission system: data = 100111100 and parity = 0
Correct : B. false
45. The CASE control structure is used when an expression has a list of possible values.
Correct : A. true
46. An encoder in which the highest and lowest value input digits are encoded simultaneously is known as a priority encoder.
Correct : B. false
47. Three select lines are required to address four data input lines.
Correct : B. false
48. Single looping in groups of three is a common K-map simplification technique.
Correct : B. false
49. In true sum-of-products expressions, the inversion signs cannot cover more than single variables in a term.
Correct : A. true
50. A combinatorial logic circuit has memory characteristics that "remember" the inputs after they have been removed.
Correct : B. false
51. Which of the following is not a form of multivibrator?
Correct : C. tristable.
52. A J-K flip-flop has two control inputs. What happens to the Q output on the active edge of the clock if both control inputs are asserted simultaneously?
Correct : A. the q output toggles to the other state.
53. A master/slave bistable is formed using two bistable connected in series.
Correct : A. true
54. An astable has two metastable states and produces the function of a digital oscillator
Correct : A. true
55. In synchronous counters the clock input of each of the bistables are connected together so that each changes state at the same time.
Correct : A. true
56. 1: When the maximum clock rate is quoted for a logic family, then it applies to a
Correct : B. flip-flop
57. 2: The number of flip-flops required in a modulo N counter is
Correct : C. log2 (n)
58. 3: Flip-flop outputs are always
Correct : A. complimentary
59. 4: How many gates (minimum) are needed for a 3-bit up-counter using standard binary and using T lip-lops ? Assume unlimited fan-in.
Correct : C. 2
60. 5: The clear data and present input of the JK lip-lop are known as
Correct : C. either (a) or (b)
61. A mod-2 counter followed by a mod-5 counter is
Correct : A. same as a mode-5 counter followed by a mod- 2 counter
62. What is the maximum counting speed of a 4-bit binary counter which is composed of flip-flops with a propagation delay of 25 ns ?
Correct : B. 10 mhz
63. 8: A JK flip-lop has its J input connected to logic level 1 and its input to the Q output. A clock pulse is fed to its clock input. The flip-lop will now
Correct : D. retain its previous state
64. 9: Consider an RS lip-lops with both inputs set to 0. If a momentary '1' is applied at the input S,then the output
Correct : D. q will flip from 0 to 1
65. The output of a sequential circuit depends on
Correct : C. both present and past inputs
66. The ring counter is analogous to
Correct : C. stepping switch
67. 12: In a digital counter circuit feedback loop is introduced to
Correct : C. reduce the number of input pulses to reset the counter
68. A J-K lip-lop has its J-input connected to logic level 1 and its input to the Q output pulse is fed to its clock input the flip-flop will now
Correct : A. change its state at each clock pulse
69. Which of the following conditions must be met to avoid race around problem ?
Correct : B. t > Δt > tp
70. Match List I with List II and select the correct answer form the codes given below the list List I
A. A shift register can be
B. A multiplexer
C. A decoder can List II 1.for parallel to serial conversion
2.to generate memory can be used chip select 3.for parallel to serial conversion
CODES: A B C
Correct : C. 1 3 2
71. With the use of an electronic counter six capsules are to be filled in bottles automatically. In such a counter what will be the number of flip- flops required ?
Correct : C. 6
72. A pulse train can be delayed by a finite number of clock periods using
Correct : D. a parallel- in parallel- out shift register
73. How many illegitimate states has synchronous mod-6 counter ?
Correct : A. 3
74. A 2 bit binary multiplier can be implemented using
Correct : B. 2 input xors
and 4 input and gates only
75. A ring counter is same as
Correct : C. shift register
76. The dynamic hazard problem occurs in
Correct : C. both (a) and (b)
77. A n-stage ripple counter will count up to
Correct : A. 2n
78. The clock signals are used in sequential logic circuits to
Correct : D. synchroniz e events in various parts of system
79. 74L5138 chip functions as
Correct : A. decoder/demu ltiplexer
80. A sequential circuit outputs a ONE when an even number (> 0) of one's are input; otherwise the output is ZERO. The minimum number of states required is
Correct : C. 2
81. A shift register can be used for
Correct : D. all of these
82. Popular application of flip-flop are
Correct : D. all of these
83. For which of the following flip-flops, the output is clearly defined for all combinations of two inputs ?
Correct : C. j-k flip-lop
84. When a large number of analog signals are to be converted an analog multiplexer is used. In this case most suitable A.D. converter will be
Correct : D. successive approxima tion type
85. To build a mod-19 counter the number of flip-flops required is
Correct : B. 5
86. The astable multivibrator has
Correct : A. two quasi stable states
87. How many bits are required to encode all twenty six letters, ten symbols, and ten numerals ?
Correct : B. 6
88. The functional difference between S-R flip-flop and J-K flip-flop is that J- K flip-flop
Correct : C. accepts both inputs 1
89. In a positive edge triggered JK flip-flop, a low J and low K produces
Correct : A. no change
90. When an inverter is placed between both inputs of an SR flip-flop, then resulting flip-lop is
Correct : B. d flip-flop
91. A 2 MHz signal is applied to the input of a J-K lip-lop which is operating in the 'toggle' mode. The frequency of the signal at the output will be
Correct : D. 8 mhz
92. The master slave JK lip-flop is effectively a combination of
Correct : A. a sr flip-flop and a t flip- flop
93. It is difficult to design asynhronous sequential circuit because
Correct : D. generally they involve stability problem
94. A stable multivibrator is used as
Correct : A. comparator circuit
95. How many flip-flop are needed to divide the input frequency by 64 ?
Correct : C. 6
96. 41: In a ripple counter using edge triggered JK flfp-flops, the pulse input is applied to the
Correct : C. j and k inputs of all flip-flops
97. The number of clock pulses needed to shift one byte of data from input to the output of a 4-bit shift register is
Correct : C. 16
98. The main difference between JK and RS flip-flop is that
Correct : C. jk flip-flop accepts both inputs as 1
99. Which of the following unit will choose to transform decimal number to binary code ?
Correct : A. encoder
100. The flip-flops which operate in synchronism with external clock pulses are known as