Quiznetik

Digital Electronics and Logic Design | Set 3

1. It is best not to leave unused TTL inputs unconnected (open) because of TTL's

Correct : A. noise sensitivity

2. Which logic family combines the advantages of CMOS and TTL?

Correct : A. bicmos

3. Which is not part of emitter-coupled logic (ECL)?

Correct : D. totem- pole circuit

4. PMOS and NMOS circuits are used largely in

Correct : B. lsi functions

5. The nominal value of the dc supply voltage for TTL and CMOS is

Correct : B. 5 v

6. If ICCH is specified as 1.1 mA when VCC is 5 V and if the gate is in a static (noncharging) HIGH output state, the power dissipation (PD) of the gate is

Correct : A. 5.5 mw

7. The switching speed of CMOS is now

Correct : A. competitive with ttl

8. One advantage TTL has over CMOS is that TTL is

Correct : B. not sensitive to electrostatic discharge

9. TTL operates from a

Correct : D. 5-volt supply

10. A CMOS IC operating from a 3-volt supply will consume

Correct : A. less power than a ttl ic

11. CMOS IC packages are available in

Correct : C. dip and soic configuration s

12. The terms "low speed" and "high speed," applied to logic circuits, refer to the

Correct : C. propagation delay time

13. The power dissipation, PD, of a logic gate is the product of the

Correct : B. dc supply voltage and

14. How many different logic level ranges for TTL

Correct : D. 4

15. Metal-oxide semiconductor field-effect transistors (MOSFETs) are the active switching elements in

Correct : A. cmos circuits

16. ECL IC technology is……………….than TTL technology.

Correct : A. faster

17. A major advantage of ECL logic over TTL and CMOS is

Correct : B. high speed

18. Digital technologies being used now-a-days are

Correct : B. ttl, ecl, cmos and rtl

19. Which of the following is the fastest logic

Correct : B. ecl

20. CMOS circuits are extensively used for ON-chip computers mainly because of their extremely

Correct : C. large packing density

21. The MSI chip 7474 is

Correct : C. dual edge triggered d flip-flop (ttl).

22. The logic 0 level of a CMOS logic device is approximately

Correct : D. 0 volts

23. What is unique about TTL devices such as the 74SXX?

Correct : A. these devices use schottky transistors and diodes to prevent them from going into saturation; this results in faster turn-on and turn-off times, which translates into higher frequency operation.

24. Which of the following logic families has the shortest propagation delay?

Correct : C. ecl

25. Why must CMOS devices be handled with care?

Correct : C. because they can be damaged by static electricity discharge

26. What should be done to unused inputs on TTL gates?

Correct : D. unused and and nand inputs should be tied to vcc through a 1 k resistor; unused or and nor inputs should be grounded.

27. Assume that a particular IC has a supply voltage (Vcc) equal to +5 V and ICCH = 10 mA and ICCL = 23 mA. What is the power dissipation for the chip?

Correct : B. 82.5 mw

28. Can a 74HCMOS logic gate directly connect to a 74ALSTTL gate?

Correct : A. yes

29. What is the major advantage of ECL logic?

Correct : A. very high speed

30. As a general rule, the lower the value of the speed–power product, the better the device because of its:

Correct : B. long propagation delay and low power consumption

31. What is the difference between the 54XX and 74XX series of TTL logic gates?

Correct : C. 54xx has a wider power supply and expanded temperature range.

32. What is the range of invalid TTL output voltage?

Correct : B. 0.4–2.4 v

33. An open collector output can current, but it cannot .

Correct : A. sink, source current

34. Why is a decoupling capacitor needed for TTL ICs and where should it be connected

Correct : C. to reduce the effects of noise, connect between power supply and ground

35. Which of the following summarizes the important features of emitter- coupled logic (ECL)?

Correct : A. low noise margin, low output voltage swing, negative voltage operation, fast, and high power consumption

36. Why is a pull-up resistor needed for an open collector gate?

Correct : C. to provide the high voltage

37. Why is a pull-up resistor needed when connecting TTL logic to CMOS logic?

Correct : C. to increase the output high voltage

38. The word "interfacing" as applied to digital electronics usually means:

Correct : B. a circuit connected between the driver and load to condition a signal so that it is compatible with the load

39. The rise time (tr) is the time it takes for a pulse to rise from its                 point up to its point. The fall time (tf) is the length of time it takes to fall from the to the point.

Correct : A. 10%, 90%, 90%, 10%

40. The term buffer/driver signifies the ability to provide low output currents to drive light loads.

Correct : B. false

41. PMOS and NMOS .

Correct : A. represent mosfet devices utilizing either p-channel or n- channel devices exclusively within a given gate

42. Why is the operating frequency for CMOS devices critical for determining power dissipation?

Correct : C. at high frequencies, charging and discharging the gate capacitance will draw a heavy current from the power supply and thus increase power dissipation.

43. Ten TTL loads per TTL driver is known as:

Correct : B. fan-out

44. The problem of different current requirements when CMOS logic circuits are driving TTL logic circuits can usually be overcome by the addition of:

Correct : D. a cmos buffer or inverting buffer

45. Totem-pole outputs be connected because .

Correct : B. cannot, together, if the outputs are in opposite states excessively high currents can damage one or both devices

46. The high input impedance of MOSFETs:

Correct : B. reduces input current and power dissipation

47. The output current capability of a single 7400 NAND gate when HIGH is called

Correct : A. source current

48. The time needed for an output to change from the result of an input change is known as:

Correct : C. propagation delay

49. The problem of interfacing IC logic families that have different supply voltages (VCC's) can be solved by using a:

Correct : A. level-shifter

50. What is the advantage of using low-power Schottky (LS) over standard TTL logic?

Correct : B. less power dissipation

51. When is a level-shifter circuit needed in interfacing logic?

Correct : D. when the supply voltages are different

52. A TTL totem-pole circuit is designed so that the output transistors:

Correct : D. are never on together

53. The most common TTL series ICs are:

Correct : B. 7400

54. Which family of devices has the characteristic of preventing saturation during operation?

Correct : B. ecl

55. How many 74LSTTL logic gates can be driven from a 74TTL gate?

Correct : B. 20

56. What is the difference between the 74HC00 series and the 74HCT00 series of CMOS logic?

Correct : C. he hct series is input and output voltage compatible with ttl.

57. Why are the maximum value of VOL and the minimum value of VOH used to determine the noise margin rather than the typical values for these parameters?

Correct : A. these are worst-case conditions.

58. What is the standard TTL noise margin?

Correct : D. 0.4 v

59. Which logic family is characterized by a multiemitter transistor on the input?

Correct : C. ttl

60. he problem of the VOH(min) of a TTL IC being too low to drive a CMOS circuit and meet the CMOS requirement of VIH(min) is usually easily overcome by:

Correct : D. adding an external pull-up resistor to vcc

61. How does the 4000 series of CMOS logic compare in terms of speed and power dissipation to the standard family of TTL logic?

Correct : D. less power dissipation and slower speed

62. What should be done with unused inputs to a TTL NAND gate?

Correct : C. tie them high

63. Which of the following logic families has the highest maximum clock frequency?

Correct : B. as-ttl

64. Why is the fan-out of CMOS gates frequency dependent?

Correct : D. the input gates of the fets are predomina ntly capacitive, and as the signal frequency increases the capacitive loading also increases, thereby limiting the number of loads that may be attached to the output of the driving gate.

65. What must be done to interface TTL to CMOS?

Correct : D. a pull-up resistor must be used between the ttl output- cmos input node and vcc; the value of rp will depend on the number of cmos gates connected to the node.

66. What causes low-power Schottky TTL to use less power than the 74XX series TTL?

Correct : C. a larger value resistor

67. What are the major differences between the 5400 and 7400 series of ICs?

Correct : B. the 5400 series are military grade and allow for a wider range of supply voltages and temperature s.

68. Which of the following statements apply to CMOS devices?

Correct : D. all of the above.

69. Which of the logic families listed below allows the highest operating frequency?

Correct : B. ecl

70. What is the increase in switching speed between 74LS series TTL and 74HC/HCT (High-Speed CMOS)?

Correct : B. 10

71. What does ECL stand for?

Correct : B. emitter- coupled logic;

72. What is unique about TTL devices such as the 74S00?

Correct : D. the devices use schottky transistors and diodes to prevent them from going into saturation; this results in faster turn on and turn off times, which translates into higher frequency operation.

73. he bipolar TTL logic family that was developed to increase switching speed by preventing transistor saturation is:

Correct : D. emitter- coupled logic (ecl) and transistor- transistor logic (ttl).

74. In TTL the noise margin is between

Correct : A. 0.4 v and 0.8 v.

75. What is the transitive voltage for the voltage input of a CMOS operating from 10V supply

Correct : B. 5v

76. The highest noise margin is offered by

Correct : B. ttl

77. What is the transitive voltage for the voltage input of a CMOS operating from 10V supply ?

Correct : B. 5v

78. Which of the following logic families is well suited for high-speed operations ?

Correct : B. ecl

79. Which of the following is the fastest logic?

Correct : A. ecl

80. he digital logic family which has the lowest propagation delay time is

Correct : C. cmos

81. Which of the following statements is wrong ?

Correct : C. fan-in of a gate is always equal to fan-out of the same gate

82. Which table shows the logical state of a digital circuit output for every possible combination of logical states in the inputs ?

Correct : B. truth table

83. The digital logic family which has minimum power dissipation is

Correct : D. cmos

84. In the following question, match each of the items A, B and C on the left with an approximation item on the right A. Shift register can be used 1. for code conversion B. A multiplexer can be used 2. to generate memory slipto select C. A decoder can be used 3. for parallel to serial conversion 4. as many to one switch 5. for analog to digital conversion

Correct : B. a b c 3 4 1

85. A standard SOP form has terms that have all the variables in the domain of the expression.

Correct : A. sum

86. How many data select lines are required for selecting eight inputs?

Correct : C. 3

87. Half adder circuit is ?

Correct : B. a circuit to add two bits together

88. The full adder adds the Kth bits of two numbers to the

Correct : C. carry from ( k - 1 )th bit

89. The number of two input multiplexers required to construct a 210 input multiplexer is,

Correct : D. 1023

90. A small dot or circle printed on top of an IC indicates

Correct : D. pin 1

91. Which of the following adders can add three or more numbers at a time ?

Correct : B. carry-look- ahead adder

92. An AND circuit

Correct : B. gives an output when all input signals are present simultaneous ly

93. What are the three output conditions of a three-state buffer?

Correct : C. both of the above

94. The device which changes from serial data to parallel data is

Correct : C. demultiple xer

95. A device which converts BCD to Seven Segment is called

Correct : D. decoder

96. How many 3-line-to-8-line decoders are required for a 1-of-32 decoder?

Correct : C. 4

97. A device which converts BCD to Seven Segment is called

Correct : B. decoder

98. A multiplexer is a logic circuit that

Correct : C. accepts many inputs and gives one output

99. In order to implement a n variable switching function, a MUX must have

Correct : A. 2n inputs

100. A latch is constructed using two cross-coupled

Correct : D. nand gates