Quiznetik
Digital Principles and System Design | Set 3
1. When both inputs of SR latches are high, the latch goes
A. unstable
B. stable
C. metastable
D. bistable
Correct : C. metastable
2. The register is a type of
A. sequential circuit
B. combinational circuit
C. cpu
D. latches
Correct : A. sequential circuit
3. How many types of registers are?
A. 2
B. 3
C. 4
D. 5
Correct : C. 4
4. The main difference between a register and a counter is
A. a register has no specific sequence of states
B. a counter has no specific sequence of states
C. a register has capability to store one bit of information but counter has n-bit
D. a register counts data
Correct : A. a register has no specific sequence of states
5. In serial shifting method, data shifting occurs
A. universal shift register
B. unidirectional shift register
C. unipolar shift register
D. unique shift register
Correct : B. unidirectional shift register
6. A register that is used to store binary information is called
A. data register
B. binary register
C. shift register
D. d – register
Correct : B. binary register
7. A shift register is defined as
A. the register capable of shifting information to another register
B. the register capable of shifting information either to the right or to the left
C. the register capable of shifting information to the right only
D. the register capable of shifting information to the left only
Correct : B. the register capable of shifting information either to the right or to the left
8. In digital logic, a counter is a device which
A. counts the number of outputs
B. stores the number of times a particular event or process has occurred
C. stores the number of times a clock pulse rises and falls
D. counts the number of inputs
Correct : B. stores the number of times a particular event or process has occurred
9. A counter circuit is usually constructed of
A. a number of latches connected in cascade form
B. a number of nand gates connected in cascade form
C. a number of flip-flops connected in cascade
D. a number of nor gates connected in cascade form
Correct : C. a number of flip-flops connected in cascade
10. 4 COUNTERS
A. 0 to 2n
B. 0 to 2n + 1
C. 0 to 2n – 1
D. 0 to 2n+1/2
Correct : C. 0 to 2n – 1
11. How many types of the counter are there?
A. 2
B. 3
C. 4
D. 5
Correct : B. 3
12. A decimal counter has states.
A. 5
B. 10
C. 15
D. 20
Correct : B. 10
13. Ripple counters are also called
A. ssi counters
B. asynchronous counters
C. synchronous counters
D. vlsi counters
Correct : B. asynchronous counters
14. Synchronous counter is a type of
A. ssi counters
B. lsi counters
C. msi counters
D. vlsi counters
Correct : C. msi counters
15. Three decade counter would have
A. 2 bcd counters
B. 3 bcd counters
C. 4 bcd counters
D. 5 bcd counters
Correct : B. 3 bcd counters
16. BCD counter is also known as
A. parallel counter
B. decade counter
C. synchronous counter
D. vlsi counter
Correct : B. decade counter
17. The parallel outputs of a counter circuit represent the
A. parallel data word
B. clock frequency
C. counter modulus
D. clock count
Correct : D. clock count
18. A sequential logic can’t be executed by concurrent statements only.
A. true
B. false
Correct : A. true
19. Which of the following sequential circuit doesn’t need a clock signal?
A. flip flop
B. asynchronous counter
C. shift register
D. latch
Correct : D. latch
20. The following timing diagram shows flip flop.
A. t flip-flop
B. d flip-flop
C. sr flip-flop
D. jk flip-flop
Correct : B. d flip-flop
21. The process used for implementation of sequential logic in VHDL is called process.
A. sequential process
B. combinational process
C. clocked process
D. unclocked process
Correct : C. clocked process
22. Why do we need to define clock signal in the sensitivity list of the process?
A. to trigger the statement as soon as there is some event on clock
B. to trigger the clock signal as soon as there is some event on input
C. to trigger the clock signal as soon as there is some event on output
D. to trigger the statement as soon as there is some event on input
Correct : A. to trigger the statement as soon as there is some event on clock
23. A user has designed JK flip flop by using the VHDL code. The output is continuously switching between 0 and 1. This condition is known as
A. switching condition
B. master slave condition
C. race around condition
D. edge triggered condition
Correct : C. race around condition
24. Which of the following method is not used to remove the race around condition in a flip flop?
A. using level triggered flip flop
B. using master slave flip flop
C. using edge triggered flip flop
D. all of the above are used to remove the race around
Correct : A. using level triggered flip flop
25. Which of the following attribute is generally used in implementation of sequential circuits?
A. ‘stable
B. ‘length
C. ‘last_event
D. ‘event
Correct : D. ‘event
26. Which of the following line is correct for detecting positive edge of a clock?
A. if (clk’event and clk = ‘0’)
B. if (clk’event and clk = ‘1’)
C. if (clk’event or clk = ‘0’)
D. if (clk’event or clk = ‘1’)
Correct : B. if (clk’event and clk = ‘1’)
27. A user doesn’t want to use the IF statement for detecting clock edge. It is possible to do the same by using any other keyword in VHDL.
A. true
B. false
Correct : A. true
28. Sequential circuits are represented as
A. finite state machine
B. infinite state machine
C. finite synchronous circuit
D. infinite asynchronous circuit
Correct : A. finite state machine
29. Sequential circuit includes
A. delays
B. feedback
C. delays and feedback from input to output
D. delays and feedback from output to input
Correct : D. delays and feedback from output to input
30. Which constitutes the test vectors in sequential circuits?
A. feedback variables
B. delay factors
C. test patterns
D. all input combinations
Correct : A. feedback variables
31. Outputs are functions of
A. present state
B. previous state
C. next state
D. present and next state
Correct : A. present state
32. Which is the delay elements for clocked system?
A. and gates
B. or gates
C. flip-flops
D. multiplexers
Correct : C. flip-flops
33. Which contributes to the necessary delay element?
A. flip-flops
B. circuit propagation elements
C. negative feedback path
D. shift registers
Correct : B. circuit propagation elements
34. In an OR gate, if A and B are two inputs and there is struck at 1 fault in B path, then output will be
A. a
B. 0
C. 1
D. b’
Correct : C. 1
35. Iterative test generation method suits for circuits with
A. no feedback loops
B. few feedback loops
C. more feedback loops
D. negative feedback loops only
Correct : B. few feedback loops
36. Which method is very time consuming?
A. d-algorithm
B. iterative test generation
C. pseudo exhaustive method
D. test generation pattern
Correct : B. iterative test generation
37. In this iterative test generation method, sequential logic is
A. used in the same pattern
B. converted to test logic
C. converted to combinational logic
D. converted to asynchronous logic
Correct : C. converted to combinational logic
38. For a NAND gate, struck-at 1 fault in second input line cannot be detected if
A. q is 1
B. q is 0
C. q changes from 1 to 0
D. q changes from 0 to 1
Correct : B. q is 0
39. Any condition that causes a processor to stall is called as
A. hazard
B. page fault
C. system error
D. none of the mentioned
Correct : A. hazard
40. In this technique, a simple fault manifests into multiple N faults.
A. true
B. false
Correct : A. true
41. The contention for the usage of a hardware device is called
A. structural hazard
B. stalk
C. deadlock
D. none of the mentioned
Correct : A. structural hazard
42. The situation wherein the data of operands are not available is called
A. data hazard
B. stock
C. deadlock
D. structural hazard
Correct : A. data hazard
43. The stalling of the processor due to the unavailability of the instructions is called as
A. control hazard
B. structural hazard
C. input hazard
D. none of the mentioned
Correct : A. control hazard
44. The time lost due to the branch instruction is often referred to as
A. latency
B. delay
C. branch penalty
D. none of the mentioned
Correct : C. branch penalty
45. method is used in centralized systems to perform out of order execution.
A. scorecard
B. score boarding
C. optimizing
D. redundancy
Correct : B. score boarding
46. The algorithm followed in most of the systems to perform out of order execution is
A. tomasulo algorithm
B. score carding
C. reader-writer algorithm
D. none of the mentioned
Correct : A. tomasulo algorithm
47. What are the typical values of tOE?
A. 10 to 20 ns for bipolar
B. 25 to 100 ns for nmos
C. 12 to 50 ns for cmos
D. all of the mentioned
Correct : D. all of the mentioned
48. Which of the following is not a type of memory?
A. ram
B. fprom
C. eeprom
D. rom
Correct : C. eeprom
49. The chip by which both the operation of read and write is performed
A. ram
B. rom
C. prom
D. eprom
Correct : A. ram
50. RAM is also known as
A. rwm
B. mbr
C. mar
D. rom
Correct : A. rwm
51. If a RAM chip has n address input lines then it can access memory locations upto
A. 2(n-1)
B. 2(n+1)
C. 2n
D. 22n
Correct : C. 2n
52. The n-bit address is placed in the
A. mbr
B. mar
C. ram
D. rom
Correct : B. mar
53. Which of the following control signals are selected for read and write operations in a RAM?
A. data buffer
B. chip select
C. read and write
D. memory
Correct : C. read and write
54. Computers invariably use RAM for
A. high complexity
B. high resolution
C. high speed main memory
D. high flexibility
Correct : C. high speed main memory
55. How many types of RAMs are?
A. 2
B. 3
C. 4
D. 5
Correct : A. 2
56. Static RAM employs
A. bjt or mosfet
B. fet or jfet
C. capacitor or bjt
D. bjt or mos
Correct : D. bjt or mos
57. Dynamic RAM employs
A. capacitor or mosfet
B. fet or jfet
C. capacitor or bjt
D. bjt or mos
Correct : A. capacitor or mosfet
58. Which one of the following is volatile in nature?
A. rom
B. erom
C. prom
D. ram
Correct : D. ram
59. The magnetic core memories have been replaced by semiconductor RAMs, why?
A. semiconductor rams are highly flexible
B. semiconductor rams have highest storing capacity
C. semiconductor rams are smaller in size
D. all of the mentioned
Correct : D. all of the mentioned
60. The data written in flip-flop remains stored as long as
A. d.c. power is supplied
B. d.c. power is removed
C. a.c. power is supplied
D. a.c. power is removed
Correct : A. d.c. power is supplied
61. Memory is a/an
A. device to collect data from other computer
B. block of data to keep data separately
C. indispensable part of computer
D. device to connect through all over the world
Correct : C. indispensable part of computer
62. The instruction used in a program for executing them is stored in the
A. cpu
B. control unit
C. memory
D. microprocessor
Correct : C. memory
63. A register is able to hold
A. data
B. word
C. nibble
D. both data and word
Correct : B. word
64. A register file holds
A. a large number of word of information
B. a small number of word of information
C. a large number of programs
D. a modest number of words of information
Correct : D. a modest number of words of information
65. The very first computer memory consisted of
A. a small display
B. a large memory storage equipment
C. an automatic keyboard input
D. an automatic mouse input
Correct : B. a large memory storage equipment
66. A minute magnetic toroid is also called as
A. large memory
B. small memory
C. core memory
D. both small and large memory
Correct : C. core memory
67. Which one of the following has capability to store data in extremely high densities?
A. register
B. capacitor
C. semiconductor
D. flip-flop
Correct : C. semiconductor
68. A large memory is compressed into a small one by using
A. lsi semiconductor
B. vlsi semiconductor
C. cdr semiconductor
D. ssi semiconductor
Correct : B. vlsi semiconductor
69. VLSI chip utilizes
A. nmos
B. cmos
C. bjt
D. all of the mentioned
Correct : D. all of the mentioned
70. CD-ROM refers to
A. floppy disk
B. compact disk-read only memory
C. compressed disk-read only memory
D. compressed disk- random access memory
Correct : B. compact disk-read only memory
71. Data stored in an electronic memory cell can be accessed at random and on demand using
A. memory addressing
B. direct addressing
C. indirect addressing
D. control unit
Correct : B. direct addressing
72. The full form of PLD is
A. programmable large device
B. programmable long device
C. programmable logic device
D. programmable lengthy device
Correct : C. programmable logic device
73. The evolution of PLD began with
A. erom
B. ram
C. prom
D. eeprom
Correct : A. erom
74. A ROM is defined as
A. read out memory
B. read once memory
C. read only memory
D. read one memory
Correct : C. read only memory
75. In layering, n layers provide service to
A. n layer
B. n-1 layer
C. n+1 layer
D. none of the mentioned
Correct : C. n+1 layer
76. Which can be used as an intermediate device in between transmitter entity and receiver entity?
A. ip router
B. microwave router
C. telephone switch
D. all of the mentioned
Correct : D. all of the mentioned
77. Which has comparatively high frequency component?
A. sine wave
B. cosine wave
C. square wave
D. none of the mentioned
Correct : C. square wave
78. Which has continuous transmission?
A. asynchronous
B. synchronous
C. asynchronous & synchronous
D. none of the mentioned
Correct : B. synchronous
79. Which requires bit transitions?
A. asynchronous
B. synchronous
C. asynchronous & synchronous
D. none of the mentioned
Correct : B. synchronous
80. In synchronous transmission, receiver must stay synchronous for
A. 4 bits
B. 8 bits
C. 9 bits
D. 16 bits
Correct : C. 9 bits
81. Which is more efficient?
A. parity check
B. cyclic redundancy check
C. parity & cyclic redundancy check
D. none of the mentioned
Correct : B. cyclic redundancy check
82. Which can detect two bit errors?
A. parity check
B. cyclic redundancy check
C. parity & cyclic redundancy check
D. none of the mentioned
Correct : B. cyclic redundancy check
83. CRC uses
A. multiplication
B. binary division
C. multiplication & binary division
D. none of the mentioned
Correct : C. multiplication & binary division
84. Which of the following has the capability to store the information permanently?
A. ram
B. rom
C. storage cells
D. both ram and rom
Correct : B. rom
85. ROM has the capability to perform
A. write operation only
B. read operation only
C. both write and read operation
D. erase operation
Correct : B. read operation only
86. Since, ROM has the capability to read the information only then also it has been designed, why?
A. for controlling purpose
B. for loading purpose
C. for booting purpose
D. for erasing purpose
Correct : C. for booting purpose
87. The ROM is a
A. sequential circuit
B. combinational circuit
C. magnetic circuit
D. static circuit
Correct : B. combinational circuit
88. ROM is made up of
A. nand and or gates
B. nor and decoder
C. decoder and or gates
D. nand and decoder
Correct : C. decoder and or gates
89. In ROM, each bit is a combination of the address variables is called
A. memory unit
B. storage class
C. data word
D. address
Correct : D. address
90. What is memory decoding?
A. the process of memory ic used in a digital system is overloaded with data
B. the process of memory ic used in a digital system is selected for the range of address assigned
C. the process of memory ic used in a digital system is selected for the range of data assigned
D. the process of memory ic used in a digital system is overloaded with data allocated in memory cell
Correct : B. the process of memory ic used in a digital system is selected for the range of address assigned
91. Which is not a removable drive?
A. zip
B. hard disk
C. super disk
D. jaz
Correct : C. super disk
92. In ROM, each bit combination that comes out of the output lines is called
A. memory unit
B. storage class
C. data word
D. address
Correct : C. data word
93. VLSI chip utilizes
A. nmos
B. cmos
C. bjt
D. all of the mentioned
Correct : D. all of the mentioned
94. How many address bits are required to select memory location in Memory decoder?
A. 4 kb
B. 8 kb
C. 12 kb
D. 16 kb
Correct : C. 12 kb
95. How memory expansion is done?
A. by increasing the supply voltage of the memory ics
B. by decreasing the supply voltage of the memory ics
C. by connecting memory ics together
D. by separating memory ics
Correct : C. by connecting memory ics together
96. IC 4116 is organised as
A. 512 * 4
B. 16 * 1
C. 32 * 4
D. 64 * 2
Correct : C. 32 * 4
97. PLD contains a large number of
A. flip-flops
B. gates
C. registers
D. all of the mentioned
Correct : D. all of the mentioned
98. How many 1024 * 1 RAM chips are required to construct a 1024 * 8 memory system?
A. 4
B. 6
C. 8
D. 12
Correct : C. 8
99. How many 16K * 4 RAMs are required to achieve a memory with a capacity of 64K and a word length of 8 bits?
A. 2
B. 4
C. 6
D. 8
Correct : D. 8
100. Why antifuses are implemented in a PLD?
A. to protect from high voltage
B. to increase the memory
C. to implement the programmes
D. as a switching devices
Correct : C. to implement the programmes