Quiznetik

Digital Logic Circuits (DLC) | Set 1

1. Any signed negative binary number is recognised by its

Correct : A. msb

2. The parameter through which 16 distinct values can be represented is known as

Correct : C. word

3. The representation of octal number (532.2)8 in decimal is

Correct : A. (346.25)10

4. The decimal equivalent of the binary number (1011.011)2 is

Correct : A. (11.375)10

5. An important drawback of binary system is

Correct : A. it requires very large string of 1’s and 0’s to represent a decimal number

6. The decimal equivalent of the octal number (645)8 is

Correct : C. (421)10

7. The largest two digit hexadecimal number is

Correct : C. (ff)16

8. Representation of hexadecimal number (6DE)H in decimal:

Correct : A. 6 * 162 + 13 * 161 + 14 * 160

9. The quantity of double word is

Correct : B. 32 bits

10. What does RTL in digital circuit design stand for?

Correct : C. register transfer level

11. RTL is a design abstraction of what kind of circuit?

Correct : B. synchronous digital circuit

12. RTL is used in HDL to create what level of representations in the circuit?

Correct : A. high-level

13. RTL mainly focuses on describing the flow of signals between

Correct : B. registers

14. Which flip-flop is usually used in the implementation of the registers?

Correct : A. d flip-flop

15. Which of the following tool performs logic optimization?

Correct : B. synthesis tool

16. Hold time is the time needed for the data to after the edge of the clock is triggered.

Correct : C. remain constant

17. Simulator enters in which phase after the initialization phase?

Correct : A. execution phase

18. All input of NOR as low produces result as

Correct : C. high

19. In RTL NOR gate, the output is at logic 1 only when all the inputs are at

Correct : A. logic 0

20. The role of the is to convert the collector current into a voltage in RTL.

Correct : A. collector resistor

21. The limitations of the one transistor RTL NOR gate are overcome by

Correct : C. multi-transistor rtl implementation

22. The primary advantage of RTL technology was that

Correct : C. it uses a minimum number of transistors

23. The disadvantage of RTL is that

Correct : B. it results in high power dissipation

24. TTL circuits with “totem-pole” output stage minimize

Correct : A. the power dissipation in rtl

25. The minimum number of transistors can be used by 2 input AND gate is

Correct : A. 2

26. Diode–transistor logic (DTL) is the direct ancestor of

Correct : B. transistor–transistor logic

27. In DTL logic gating function is performed by

Correct : A. diode

28. In DTL amplifying function is performed by

Correct : B. transistor

29. How many stages a DTL consist of?

Correct : B. 3

30. The full form of CTDL is

Correct : A. complemented transistor diode logic

31. The DTL propagation delay is relatively

Correct : A. large

32. The way to speed up DTL is to add an across intermediate resister is

Correct : A. small “speed-up” capacitor

33. The process to avoid saturating the switching transistor is performed by

Correct : A. baker clamp

34. A major advantage of DTL over the earlier resistor–transistor logic is the

Correct : B. increased fan in

35. To increase fan-out of the gate in DTL

Correct : C. an additional transistor and diode may be used

36. A disadvantage of DTL is

Correct : B. the input resister to the transistor

37. Compatibility refers to

Correct : A. the output of a circuit should match with the input of another circuit

38. The method of connecting a driving device to a loading device is known as

Correct : B. interface

39. The first CML logic was introduced by General Electric in

Correct : C. 1961

40. Schottky families prevent the saturating using

Correct : D. schottky diodes

41. The basic idea of basic CML circuit came from an

Correct : D. both inverter and buffer

42. The full form of MECL is

Correct : B. motorola emitter coupled logic

43. Motorola has offered MECL circuits in logic families.

Correct : C. 5

44. The latest entrant to the ECL family is

Correct : B. ecl 100k

45. All input of NOR as low produces result as

Correct : C. high

46. In RTL NOR gate, the output is at logic 1 only when all the inputs are at

Correct : A. logic 0

47. The full form of CMOS is

Correct : C. complementary metal oxide semiconductor

48. The full form of COS-MOS is

Correct : A. complementary symmetry metal oxide semiconductor

49. CMOS is also sometimes referred to as

Correct : C. complementary symmetry metal oxide semiconductor

50. CMOS technology is used in

Correct : D. both microprocessor and digital logic

51. Two important characteristics of CMOS devices are

Correct : D. both high noise immunity and low static power consumption

52. CMOS behaves as a/an

Correct : C. inverter

53. An important characteristic of a CMOS circuit is the

Correct : B. duality

54. CMOS logic dissipates power than NMOS logic circuits.

Correct : B. less

55. Semiconductors are made of

Correct : A. ge and si

56. Which chip were the first RTC and CMOS RAM chip to be used in early IBM computers, capable of storing a total of 64 bytes?

Correct : C. the motorola 146818

57. The full form of ECL is

Correct : C. emitter-coupled logic

58. Which logic is the fastest of all the logic families?

Correct : B. ecl

59. Sometimes ECL can also be named as

Correct : C. cml

60. In an ECL the output is taken from

Correct : C. collector

61. The ECL behaves as

Correct : B. nor gate

62. In ECL the fanout capability is

Correct : A. high

63. ECL’s major disadvantage is that

Correct : A. it requires more power

64. The full form of SCFL is

Correct : B. source-coupled logic

65. The equivalent of emitter-coupled logic made out of FETs is called

Correct : B. scfl

66. ECL was invented in by

Correct : C. 1956, hannon s. yourke

67. At the time of invention, an ECL was called as

Correct : C. current-steering logic

68. The ECL circuits usually operates with

Correct : A. negative voltage

69. Low-voltage positive emitter-coupled logic (LVPECL) is a power optimized version of

Correct : C. pecl

70. Transistor–transistor logic (TTL) is a class of digital circuits built from

Correct : D. bipolar junction transistors (bjt) and resistors

71. TTL was invented in 1961 by

Correct : B. james l. buie

72. The full form of TCTL is

Correct : A. transistor-coupled transistor logic

73. The ancestor to the first personal computers.

Correct : C. kenbak 1

74. TTL inputs are the emitters of a

Correct : B. multiple-emitter transistor

75. TTL is a

Correct : A. current sinking

76. Standard TTL circuits operate with a volt power supply.

Correct : C. 5

77. A TTL gate may operate inadvertently as an

Correct : B. analog amplifier

78. Which statement below best describes a Karnaugh map?

Correct : A. it is simply a rearranged truth table

79. Which of the examples below expresses the commutative law of multiplication?

Correct : D. a • b = b • a

80. The Boolean expression Y = (AB)’ is logically equivalent to what single gate?

Correct : A. nand

81. The systematic reduction of logic circuits is accomplished by:

Correct : C. using boolean algebra

82. Each “1” entry in a K-map square represents:

Correct : A. a high for each input truth table condition that produces a high output

83. Each “0” entry in a K-map square represents:

Correct : A. a high for each input truth table condition that produces a high output

84. Looping on a K-map always results in the elimination of

Correct : C. variables within the loop that appear in both complemented and uncomplemented form

85. Which of the following expressions is in the sum-of-products form?

Correct : D. a * b + c * d

86. What is an ambiguous condition in a NAND based S’-R’ latch?

Correct : D. s’=0, r’=0

87. In a NAND based S’-R’ latch, if S’=1 & R’=1 then the state of the latch is

Correct : A. no change

88. A NAND based S’-R’ latch can be converted into S-R latch by placing

Correct : D. both a d latch and an inverter at its input

89. The difference between a flip-flop & latch is

Correct : C. latches has one input but flip-flop has two

90. How many types of flip-flops are?

Correct : C. 4

91. The S-R flip flop consist of

Correct : B. two additional and gates

92. What is one disadvantage of an S-R flip-flop?

Correct : D. invalid state

93. One example of the use of an S-R flip-flop is as

Correct : C. binary storage register

94. When is a flip-flop said to be transparent?

Correct : B. when the q output follows the input

95. On a positive edge-triggered S-R flip-flop, the outputs reflect the input condition when

Correct : C. the clock pulse transitions from low to high

96. What is the hold condition of a flip-flop?

Correct : B. no active s or r input

97. One example of the use of an S-R flip-flop is as

Correct : C. switch debouncer

98. The truth table for an S-R flip-flop has how many VALID entries?

Correct : C. 3

99. When both inputs of a J-K flip-flop cycle, the output will

Correct : C. not change

100. Which of the following is correct for a gated D-type flip-flop?

Correct : A. the q output is either set or reset as soon as the d input goes high or low