Quiznetik

Parallel Computing | Set 1

1. A collection of lines that connects several devices is called ..............

Correct : A. bus

2. A complete microcomputer system consist of ...........

Correct : D. all of the above

3. PC Program Counter is also called ...................

Correct : A. instruction pointer

4. In a single byte how many bits will be there?

Correct : A. 8

5. CPU does not perform the operation ..................

Correct : A. data transfer

6. The access time of memory is ............... the time required for performing any single CPU operation.

Correct : A. longer than

7. Memory address refers to the successive memory words and the machine is called as ............

Correct : A. word addressable

8. A microprogram written as string of 0's and 1's is a .............

Correct : D. binary micro-program

9. A pipeline is like ....................

Correct : A. an automobile assembly line

10. Data hazards occur when .....................

Correct : B. pipeline changes the order of read/write access to operands

11. Processors of all computers, whether micro, mini or mainframe must have

Correct : D. all of above

12. What is the control unit's function in the CPU?

Correct : D. to decode program instruction

13. What is meant by a dedicated computer?

Correct : B. which is assigned to one and only one task

14. Which of the following code is used in present day computing was developed by IBM corporation?

Correct : D. ebcdic code

15. When a subroutine is called, the address of the instruction following the CALL instructions stored in/on the

Correct : D. stack

16. A microprogram written as string of 0's and 1's is a

Correct : D. binary microprogram

17. Interrupts which are initiated by an instruction are

Correct : B. external

18. Memory access in RISC architecture is limited to instructions

Correct : C. sta and lda

19. From where interrupts are generated?

Correct : D. i/o devices

20. The output of a gate is low when at least one of its input is low . It is true for

Correct : A. and gate

21. Which one of the following is most suitable to make a parity checker

Correct : C. exclusive- or gate

22. What is the minimum number of flip-flops required in a counter to count 100 pulses?

Correct : B. seven

23. For a RS flip-flop constructed with NAND gates and input R=1 and s=1 the state is

Correct : D. unused state

24. The advantage of RISC processor over CISC processor is that

Correct : B. an instruction can be executed in one cycle

25. Which of the following is true about interrupts?

Correct : A. they are generated when memory cycles are stolen

26. Te devices connected to a microprocessor can use the data bus:

Correct : C. only when it’s sending or receiving data

27. Intel 8080 microprocessor has an instruction set of 91 instruction. The opcode to implement this instruction set should be at least

Correct : C. 7 bit long

28. Dynamic RAMs are best suited to

Correct : A. slow system

29. Intel Pentium CPU is a

Correct : A. risc based

30. A modem is used to link up two computers via

Correct : C. both of the above

31. The maximum integer which can be stored on a 8 bit accumulator is

Correct : C. 255

32. In a system with a 16 bit address bus, what is the maximum number of 1K byte memory devices it could contain

Correct : C. 256

33. Which of the following memories in a computer is volatile?

Correct : A. ram

34. A peripheral is

Correct : C. any physical device connected to the computer

35. How many bits do you think will be adequate to encode individual character in Devnagari script

Correct : D. 10

36. Which of the following bus is used to transfer data from main memory to peripheral device?

Correct : C. data bus

37. To provide increased memory capacity for operating system, the

Correct : A. virtual memory is created

38. CD -RAW is

Correct : B. output device only

39. Which of the following require large computer memory?

Correct : D. all of the above

40. Which major development led to the production of microcomputers?

Correct : D. integrated circuits

41. In immediate addressing the operand is placed

Correct : B. after opcode in the instruction

42. The 16- bit registers in 8085 is

Correct : C. stack pointer and program counter

43. Instruction pipelining has minimum stages

Correct : B. 2

44. Systems that do not have parallel processing capabilities are

Correct : A. sisd

45. The word size of the microprocessor refers to

Correct : B. the amount of a information that can be stored in a cycle

46. How many address lines are needed to address each memory location in a 2048X 4 memory chip?

Correct : B. 11

47. Pipelining strategy is called implement

Correct : B. instruction prefetch

48. The concept of pipelining is most effective in improving performance if the tasks being performed in different stages :

Correct : B. require about the same amount of time

49. Which Algorithm is better choice for pipelining?

Correct : C. merge-sort algorithm

50. The expression 'delayed load' is used in context of

Correct : C. pipelining

51. Parallel processing may occur

Correct : C. both[a] and [b]

52. The cost of a parallel processing is primarily determined by :

Correct : C. circuit complexity

53. An instruction to provide small delay in program

Correct : B. nop

54. Characteristic of RISC (Reduced Instruction Set Computer) instruction set is

Correct : C. one instruction per cycle

55. In daisy-chaining priority method, all the devices that can request an interrupt are connected in

Correct : B. serial

56. Which one of the following is a characteristic of CISC (Complex Instruction Set Computer)

Correct : B. variable format instructions

57. During the execution of the instructions, a copy of the instructions is placed in the ______ .

Correct : D. cache

58. Two processors A and B have clock frequencies of 700 Mhz and 900 Mhz respectively. Suppose A can execute an instruction with an average of 3 steps and B can execute with an average of 5 steps. For the execution of the same instruction which processor is faster ?

Correct : A. a

59. A processor performing fetch or decoding of different instruction during the execution of another instruction is called ______ .

Correct : B. pipe-lining

60. For a given FINITE number of instructions to be executed, which architecture of the processor provides for a faster execution ?

Correct : C. super-scalar

61. The clock rate of the processor can be improved by,

Correct : D. all of the above

62. An optimizing Compiler does,

Correct : B. takes advantage of the type of processor and reduces its process time.

63. The ultimate goal of a compiler is to,

Correct : A. reduce the clock cycles for a programming task.

64. SPEC stands for,

Correct : C. system performance evaluation corporation.

65. As of 2000, the reference system to find the performance of a system is _____ .

Correct : A. ultra sparc 10

66. The average number of steps taken to execute the set of instructions can be made to be less than one by following _______ .

Correct : C. super-scaling

67. If a processor clock is rated as 1250 million cycles per second, then its clock period is ________ .

Correct : D. 8 * 10 ^ -10 sec

68. If the instruction, Add R1,R2,R3 is executed in a system which is pipe-lined, then the value of S is (Where S is term of the Basic performance equation)

Correct : C. ~1

69. CISC stands for,

Correct : C. complex instruction set computer

70. As of 2000, the reference system to find the SPEC rating are built with _____ Processor.

Correct : B. ultra sparc -iii 300mhz

71. The CISC stands for

Correct : D. complex instruction set computer

72. The Sun micro systems processors usually follow _____ architecture.

Correct : D. risc

73. The iconic feature of the RISC machine among the following are

Correct : C. having a branch delay slot

74. Both the CISC and RISC architectures have been developed to reduce the______.

Correct : C. semantic gap

75. Out of the following which is not a CISC machine.

Correct : D. motorola a567

76. Pipe-lining is a unique feature of _______.

Correct : A. risc

77. In CISC architecture most of the complex instructions are stored in _____.

Correct : D. transistors

78. Which of the architecture is power efficient?

Correct : B. risc

79. It is the simultaneous use of multiple compute resources to solve a computational problem

Correct : A. Parallel computing

80. Parallel Execution

Correct : B. Execution of a program by more than one task, with each task being able to execute the same or different statement at the same moment in time

81. Scalability refers to a parallel system’s (hardware and/or software) ability

Correct : B. To demonstrate a proportionate increase in parallel speedup with the addition of more processors

82. Parallel computing can include

Correct : C. Combination of both A and B

83. Serial Execution

Correct : A. A sequential execution of a program, one statement at a time

84. Shared Memory is

Correct : A. A computer architecture where all processors have direct access to common physical memory

85. Distributed Memory

Correct : B. It refers to network based memory access for physical memory that is not common

86. Parallel Overhead is

Correct : B. The amount of time required to coordi- nate parallel tasks. It includes factors such as: Task start-up time, Synchro- nizations, Data communications.

87. Massively Parallel

Correct : B. The amount of time required to coordinate parallel tasks. It includes factors such as: Task start-up time, Synchronizations, Data communications.

88. Fine-grain Parallelism is

Correct : B. Here relatively small amounts of computational work are done between communication events

89. In shared Memory

Correct : B. Changes in a memory location effected by one processor are visible to all other processors

90. In shared Memory:

Correct : A. Here all processors access, all memory as global address space

91. In shared Memory

Correct : A. Multiple processors can operate independently but share the same memory resources

92. In designing a parallel program, one has to break the problem into discreet chunks of work that can be distributed to multiple tasks. This is known as

Correct : D. Both A and B

93. Latency is

Correct : C. It is the time it takes to send a minimal (0 byte) message from one point to other point

94. Domain Decomposition

Correct : A. Partitioning in that the data associated with a problem is decompose(D) Each parallel task then works on a portion of the dat(A)

95. Functional Decomposition:

Correct : B. Partitioning in that, the focus is on the computation that is to be performed rather than on the data manipulated by the computation. The problem is decomposed according to the work that must be done. Each task then performs a portion of the overall work.

96. Synchronous communications

Correct : A. It require some type of “handshaking” between tasks that are sharing dat(A) This can be explicitly structured in code by the programmer, or it may happen at a lower level unknown to the pro- grammer.

97. Collective communication

Correct : A. It involves data sharing between more than two tasks, which are often specified as being members in a common group, or collective.

98. Point-to-point communication referred to

Correct : B. It involves two tasks with one task acting as the sender/producer of data, and the other acting as the receiver/consumer.*

99. Uniform Memory Access (UMA) referred to

Correct : A. Here all processors have equal access and access times to memory

100. Asynchronous communications

Correct : C. It allows tasks to transfer data independently from one another.