Quiznetik

Microprocessor and Assembly Language Programming | Set 3

1. Which interrupt has the highest priority?

Correct : C. RST6.5

2. In 8085 name the 16 bit registers?

Correct : C. a & b

3. Which of the following is hardware interrupts?

Correct : C. a & b.

4. What is the RST for the TRAP?

Correct : B. RST4.5

5. What are level Triggering interrupts?

Correct : B. RST6.5&RST5.5.

6. Which interrupt is not level sensitive in 8085?

Correct : B. RST7.5 is a raising edge-trigging interrupt.

7. What are software interrupts?

Correct : A. RST 0-7

8. Which stack is used in 8085?

Correct : B. LIFO.

9. Why 8085 processor is called an 8 bit processor?

Correct : A. because 8085 processor has 8 bit alu.

10. What is SIM?

Correct : C. Set Interrupt Mask

11. RIM is used to check whether, the ___________.

Correct : B. interrupt is Masked or not .

12. What is meant by maskable interrupts?

Correct : B. an interrupt that can be turned off by the programmer.

13. In 8086, Example for Non maskable interrupts are ________.

Correct : A. trap.

14. What does microprocessor speed depends on?

Correct : C. address bus width.

15. ______ can be used as stack .

Correct : B. RAM.

16. Which processor structure is pipelined?

Correct : C. all x86 processors.

17. Address line for RST3 is?

Correct : C. 0018H.

18. In 8086 the overflow flag is set when _____________.

Correct : B. signed numbers go out of their range after an arithmetic operation.

19. The advantage of memory mapped I/O over I/O mapped I/O is _________

Correct : D. all the above

20. BHE of 8086 microprocessor signal is used to interface the _______.

Correct : B. odd bank memory.

21. In 8086 microprocessor the following has the highest priority among all type interrupts?

Correct : A. NMI.

22. In 8086 microprocessor one of the following statements is not true?

Correct : B. coprocessor is interfaced in min mode.

23. 8088 microprocessor differs with 8086 microprocessor in _______.

Correct : A. data width on the output.

24. Address line for TRAP is?

Correct : B. 0024H.

25. Access time is faster for _________.

Correct : B. SRAM.

26. In 8279 Strobed input mode, the control line goes low. The data on return lines is strobed in the ___________.

Correct : A. FIFO byte by byte.

27. ________ bit in ICW1 indicates whether the 8259A is cascade mode or not?

Correct : C. SNGL=0.

28. In 8255, under the I/O mode of operation we have ___________ modes. Which mode will have the following features?

Correct : B. Three I/O lines are available at Port C.

29. In ADC 0808 if _______ pin high enables output

Correct : D. OE.

30. In 8279, a scanned sensor matrix mode, if a sensor changes its state, the __________ line goes ___________ to interrupt the CPU

Correct : C. IRQ, high.

31. In 8279 Status Word, data is read when ________ pins are low, and write to the display RAM with ____________ are low.

Correct : A. A0, CS, RD & A0, WR, CS.

32. In 8279, the keyboard entries are de bounced and stored in an _________, that is further accessed by the CPU to read the key codes.

Correct : B. 8-byte FIFO.

33. The 8279 normally provides a maximum of ________ seven segment display interface with CPU.

Correct : B. 16.

34. For the most Static RAM the write pulse width should be at least

Correct : B. 60ns.

35. BURST refresh in DRAM is also called as ___________.

Correct : A. concentrated refresh.

36. For the most Static RAM the maximum access time is about ____________.

Correct : C. 100ns.

37. Which of the following statements on DRAM are correct? Page mode read operation is faster than RAS read. RAS input remains active during column address strobe. The row and column addresses are strobed into the internal buffers using RAS and CAS inputs respectively

Correct : C. all.

38. 8086 microprocessor is interfaced to 8253 a programmable interval timer. The maximum number by which the clock frequency on one of the timers is divided by ________________.

Correct : A. 2^16

39. 8086 is interfaced to two 8259s (Programmable interrupt controllers). If 8259s are in master slave configuration the number of interrupts available to the 8086 microprocessor is _____________.

Correct : D. 64

40. The First Microprocessor was__________.

Correct : A. Intel 4004

41. 8085 was introduced in __________.

Correct : B. 1976

42. In 1978 Intel introduced the 16 bit Microprocessor 8086 now called as________.

Correct : B. APX 80

43. Which is a 8 bit Microprocessor ?

Correct : D. Motorala MC-6801

44. Pentium-I, Pentium-II, Pentium-III and Pentium-IV are recently introduced microprocessor by__________.

Correct : B. Intel.

45. The address bus flow in __________.

Correct : B. unidirection.

46. Status register is also called as ___________.

Correct : D. flags

47. The 8085 is based in a ________ pin DIP

Correct : A. 40.

48. The 8085 Microprocessor uses__________ V power suppl

Correct : A. .+5V.

49. The address / data bus in 8085 is __________.

Correct : A. multiplexed.

50. The First electronic computer was completed in __________.

Correct : A. 1946.