Quiznetik
Microprocessor and Assembly Language Programming | Set 2
1. The port lines are connected to data lines of the _____
A. peripheral
B. microprocessor
C. address decoder
D. data decoder
Correct : A. peripheral
2. The _________ input to 8255A is usually activated by Microprocessor in system
A. clear
B. reset
C. ports
D. address bus
Correct : B. reset
3. __________ is useful for the generation of accurate time delay
A. 8254
B. 8255A
C. 8237A
D. 8279
Correct : A. 8254
4. _________ is used to refresh D-Ram and regular intervals and provide timing signals
A. 8255A
B. 8237A
C. 8254
D. 8279
Correct : C. 8254
5. The 8254 contains __________ counters
A. 2-16 bit
B. 3-16 bit
C. 2-8 bit.
D. 3-8 bit
Correct : B. 3-16 bit
6. The data bus buffer is _________data line
A. unidirectional
B. bidirectional
C. no direction
D. multi direction
Correct : B. bidirectional
7. In 8254 there are ________ pins
A. 20
B. 24
C. 30
D. 40
Correct : B. 24
8. The data lines is used to transfer _______
A. count, control and status word
B. data, control and status word
C. data, count
D. count status word
Correct : A. count, control and status word
9. The ________ input is connected to an output of the address decoder
A. address bus
B. data bus
C. chip select
D. reset
Correct : C. chip select
10. The clock signal of frequency upto _____ is supplied to clock input
A. 16 MHz
B. 8 MHz
C. 32 MHz
D. 4 MHz
Correct : B. 8 MHz
11. The ________ input is used to enable or disable
A. Clk
B. out
C. Reset
D. gate
Correct : D. gate
12. The _______ generates output way forms on the out and output line
A. Counter
B. clock
C. Gate
D. out
Correct : A. Counter
13. The ____ is constructed for the desired mode and return into control register
A. control word
B. clk signal
C. Gate
D. reset
Correct : A. control word
14. The internal block of 8237 consists of _________ channels
A. 2
B. 3
C. 4
D. 5
Correct : C. 4
15. The _______ allow data transfer between memory and peripherals
A. DMA technique
B. Microprocessor
C. Register
D. Decoder
Correct : A. DMA technique
16. The ________ in 8237 operates in either master or in slave mode
A. microprocessor
B. register
C. dma controller
D. decoder
Correct : C. dma controller
17. There are _____different types of interface in micro computer system
A. 3
B. 4
C. 5
D. 2
Correct : D. 2
18. _________ is used in high speed transfer is required
A. dma technique
B. serial communication interface
C. microprocessor
D. register
Correct : A. dma technique
19. ________ is used to eliminate clock signal
A. synchronous
B. asynchronous
C. serial
D. dma
Correct : B. asynchronous
20. Synchronization bit at the beginning of character is called ________
A. stop bit
B. simplex
C. half duplex
D. start bit
Correct : D. start bit
21. Who introduced Pentium family?
A. intel
B. wipro
C. cts
D. samsung
Correct : A. intel
22. Pentium pro processor is a ______ generation of device
A. first
B. second
C. third
D. fourth
Correct : B. second
23. In which year, Pentium pro processor introduced?
A. 1996
B. 1998
C. 1995
D. 1999
Correct : C. 1995
24. _______ has been enhanced to provide higher performance for multimedia & communication applications.
A. Pentium I
B. Pentium II
C. Pentium processor with MMX technology
D. Pentium processor with Celeron technology
Correct : C. Pentium processor with MMX technology
25. ________ is used in desktop and laptop personal computers
A. Pentium processor with MMX technology
B. Pentium Pro Processor
C. Celeron Processor
D. Intel Processor
Correct : A. Pentium processor with MMX technology
26. Expansion of SPGA is _________
A. Staggered Pin Grid-Array package
B. Staggered Point Grid-Array package
C. Staggered Plus Grid-Array package
D. Staggered per grid-Array package
Correct : A. Staggered Pin Grid-Array package
27. Pentium pro processor has _______ die
A. one
B. three
C. two
D. four
Correct : C. two
28. In Pentium-pro processor, dies are manufactured using intel ___ mm BICMOS process
A. 0.25
B. 0.35
C. 0.45
D. 0.50
Correct : B. 0.35
29. The circuitry of the Pentium pro processor is equivalent to _______ million transistors
A. 1.5
B. 2.5
C. 3.5
D. 5.5
Correct : D. 5.5
30. Pentium-pro processor design implements________ micro architecture
A. P2
B. P4
C. P6
D. P8
Correct : C. P6
31. Micro architecture employs _________ execution
A. static
B. dynamic
C. static and dynamic
D. none
Correct : B. dynamic
32. ________ is performed to determine the best order of for execution of instructions
A. system flow analysis
B. process flow analysis
C. data flow analysis.
D. control flow analysis
Correct : C. data flow analysis.
33. Pentium processor with MMX technology includes _____ new instructions and 4 new _______ data types
A. 50 & 64 bit
B. 55 & 63 bit
C. 57 & 64 bit
D. 51 & 61 bit
Correct : A. 50 & 64 bit
34. Pentium II processor is a ____generation
A. first
B. second
C. third
D. fourth
Correct : C. third
35. Pentium II processor was introduced in the year _______.
A. 1990
B. 1995
C. 1998
D. 1992
Correct : C. 1998
36. ________followed Celeron processor and Pentium II Xeon processor
A. pentium pro processor
B. pentium ii processor
C. pentium iii processor
D. pentium iv processor
Correct : B. pentium ii processor
37. Pentium II xeon processor offers _______ performance than the std Pentium II processor
A. lower
B. higher
C. medium
D. none
Correct : B. higher
38. Dual independent bus architecture was first introduced in the ________________
A. pentium pro processor
B. pentium II processor
C. pentium III processor
D. pentium IV processor
Correct : A. pentium pro processor
39. How many buses provided in Pentium II processor?
A. one
B. two
C. three
D. four
Correct : B. two
40. The system bus of both Pentium pro and Pentium II processors carry ______ bytes per clock
A. 4
B. 8
C. 7
D. 5
Correct : B. 8
41. The maximum speed of Pentium II processor is increased to _______ MHz
A. 200
B. 300
C. 100
D. 500
Correct : C. 100
42. Backside bus between L2 cache and MPU is _____ speed
A. higher
B. lower
C. medium
D. Infinite
Correct : A. higher
43. The peak bus bandwidth of backside bus (cache bus) is ______ Mbytes/second
A. 1000
B. 1600
C. 2600
D. 3400
Correct : B. 1600
44. ECC & FRC were first introduced in _________
A. pentium pro processor
B. pentium II processor
C. pentium II xeon processor
D. pentium III xeon processor
Correct : A. pentium pro processor
45. Pentium III processor was introduced in _______
A. 1999
B. 2000
C. 2010
D. 2009
Correct : A. 1999
46. Pentium III processor is manufactured using ____ process technology
A. 0.17
B. 0.16
C. 0.18
D. 0.15
Correct : C. 0.18
47. In Pentium III processor, the P6 micro architecture is enriched with an additional ______ instructions
A. 20
B. 30
C. 40
D. 70
Correct : D. 70
48. The 80386 Microprocessor family is a _____ bit microprocessor
A. 8
B. 16
C. 32
D. 64
Correct : C. 32
49. In which year, 80386 microprocessor was introduced?
A. 1999
B. 1995
C. 1985
D. 1990
Correct : C. 1985
50. Which family was the sixth member of 8086 family of microprocessors?
A. 8086
B. 8085
C. 80396 DX
D. 80486 SX
Correct : C. 80396 DX
51. The 80386DX MPU is the ______ entry in the 80386 family
A. first
B. second
C. third
D. fourth
Correct : A. first
52. Which device is high-performance member of the 80386 family of MPUs?
A. 80386SX
B. 80386DX
C. 80486SX
D. 80486DX
Correct : B. 80386DX
53. The 80386DX is a full _____ processor
A. 16 bit
B. 8 bit
C. 32 bit
D. 64 bit
Correct : C. 32 bit
54. The 80386DX has both 32 bit internal registers ______ external data bus
A. 16 bit
B. 8 bit
C. 32 bit
D. 36 bit
Correct : C. 32 bit
55. The 80486 family was introduced in the year ______
A. 1987
B. 1988
C. 1989
D. 1990
Correct : B. 1988
56. ________ maintains real modes protected-mode software compatibility with 80386 architecture
A. 80486
B. 8085
C. 8086
D. 80486 DX
Correct : A. 80486
57. 80486DX was followed by ________
A. 80486SX
B. 80386SX
C. 80386DX
D. 80486DX
Correct : A. 80486SX
58. _______ version did not have a 16-bit external architecture
A. DX
B. SX
C. TX
D. PX
Correct : B. SX
59. _______family supports both a math co processor and cache memory
A. 8086
B. 8087
C. 80386
D. 80486
Correct : C. 80386
60. _______is a co-processor
A. 8086
B. 8087
C. 80386
D. 80486
Correct : B. 8087
61. The number of hardware chips needed for multiple digit display can be minimized by using the technique called ______
A. interfacing
B. multiplexing
C. demultiplexing
D. multiprocessing
Correct : B. multiplexing
62. In multiplexing, the data lines and output ports are time shared by ______
A. Matrix keyboard
B. LCDs
C. LEDs
D. Memory
Correct : B. LCDs
63. I/o ports of programmable devices are limited in current capacity, therefore, additional transistors or ICs called ________
A. LEDs and LCSs
B. interface and multiplexer
C. segment and digit drivers
D. segment drives
Correct : C. segment and digit drivers
64. The SN75491 and SN75492 has ________ and _________ Darlington pair transistors in a package respectively
A. 3,8
B. 4,6
C. 2,4
D. 5,10
Correct : B. 4,6
65. ____________ is a commonly used input device when more than 8 key are necessary
A. Mouse
B. Joystick
C. Matrix Keyboard
D. Both (a) and (b)
Correct : C. Matrix Keyboard
66. The _________ reduces the number of connections, thus the number of interfacing device required
A. Mouse
B. Joystick
C. Monitor
D. matrix keyboard
Correct : D. matrix keyboard
67. In scanned multiplexed displays _______ should sink seven or eight times that current
A. Multiplex
B. Demultiplexer
C. Segment
D. Cathode
Correct : D. Cathode
68. The ______ is called segment or digit dri
A. Transistors
B. Cathode
C. Circuit
D. Displays
Correct : A. Transistors
69. The ______ provide the capability of eight I/o ports in interfacing circuit
A. Encoder
B. Decoder
C. Multiplexer
D. Demultiplexe
Correct : B. Decoder
70. The output line of interfacing circuit is used in _____
A. LED scanned display
B. LCD Scanned display
C. Keyboard matrix
D. Display
Correct : A. LED scanned display
71. These are _______ common cathode in scanned multiplexed displays
A. 7
B. 6
C. 5
D. 4
Correct : B. 6
72. There are ______ segment LEDs in scanned multiplexed displays
A. 5
B. 4
C. 6
D. 7
Correct : D. 7
73. An RS-232 interface is ____________
A. a parallel interface
B. a serial interface
C. printer interface
D. a modem interface
Correct : B. a serial interface
74. Expansion for DTE is ______
A. data terminal equipment
B. data trap equipment
C. data text equipment
D. data terminal extension
Correct : A. data terminal equipment
75. Expansion of DCE ________
A. data circuit terminating equipment
B. data cycle terminating equipment
C. data circuit terminating extension
D. dynamic circuit terminating equipment
Correct : A. data circuit terminating equipment
76. RS-232 is used in _________
A. common serial port
B. common signal port
C. computer serial ports
D. computer signal port
Correct : C. computer serial ports
77. Rs-232 was introduced in __________
A. 1942
B. . 1932
C. 1952
D. 1962
Correct : D. 1962
78. Compared with RS-232, USB is faster and uses___________
A. medium voltage
B. higher voltage
C. lower voltage
D. None
Correct : C. lower voltage
79. In which year, 8086 was introduced?
A. 1978
B. 1979
C. 1977
D. 1981
Correct : A. 1978
80. In which year, 8088 was announced?
A. 1979
B. 1988
C. 1999
D. 2000
Correct : A. 1979
81. What does the acronym RFID stand for?
A. remote field identification
B. radio frequency identification
C. radio field identification
D. radio frequency imaging & detection
Correct : B. radio frequency identification
82. What is a smart card ?
A. form of ATM card
B. has more storage capacity than an ATM card
C. an access card for a security system
D. contains a microprocessor
Correct : C. an access card for a security system
83. Smart Card on a microprocessor is for _______
A. safety
B. security
C. protection
D. authority
Correct : B. security
84. Smart card is used to provide ___________
A. access
B. authority
C. automation
D. access control
Correct : A. access
85. Another name for smart card ________
A. ICC
B. IFC
C. IRC
D. IC
Correct : A. ICC
86. Smart card is made up of ________
A. silicon
B. iron
C. plastic
D. rubber
Correct : C. plastic
87. Smart card size is _________
A. 85.60 x 53.98 mm
B. 85.70 x53.68 mm
C. 86.50 x 52.67 mm
D. 86.40 x51.77 mm
Correct : A. 85.60 x 53.98 mm
88. Smarts cards may have up to ______ kilobytes of RAM, ___ kilobytes of ROM, ___ kilobytes of programmable ROM, and a 16-bit microprocessor
A. 8 & 346 & 256
B. 7 & 345 & 255
C. 6 & 344 & 254
D. 5 & 343 & 253
Correct : A. 8 & 346 & 256
89. The smart card uses a __________ interface
A. serial
B. parallel
C. multple
D. single
Correct : A. serial
90. The most common smart card application is ________.
A. credit card
B. atm card
C. business card
D. system card
Correct : A. credit card
91. Expansion for HMOS technology_______
A. high level mode oxygen semiconductor
B. high level metal oxygen semiconductor
C. high performance medium oxide semiconductor
D. high performance metal oxide semiconductor
Correct : D. high performance metal oxide semiconductor
92. 8086 and 8088 contains _______ transistors
A. 29000
B. 24000
C. 34000
D. 54000
Correct : A. 29000
93. ALE stands for ___________
A. address latch enable
B. address level enable
C. address leak enable
D. address leak extension
Correct : A. address latch enable
94. What is DEN?
A. direct enable
B. data entered
C. data enable
D. data encoding
Correct : B. data entered
95. Which pin is a programmable peripheral interface?
A. 8255
B. 8258
C. 8254
D. 8259
Correct : A. 8255
96. The inside of smart card contains an ___________
A. 8085 microprocessor
B. 8086 microprocessor
C. 8088 microprocessor
D. embedded microprocessor
Correct : D. embedded microprocessor
97. RFID technology is a __________
A. automatic identification technology
B. computer tech
C. information tech
D. system tech
Correct : A. automatic identification technology
98. The information stored in RFID is ________
A. character
B. number
C. ascii
D. pneumonic
Correct : C. ascii
99. In RFID, the productivity enhancement is _______ time
A. five
B. ten
C. four
D. nine
Correct : B. ten
100. RFID chip inside the tag is ________
A. read only
B. write only
C. read-write
D. none
Correct : A. read only