Quiznetik
8086 Microprocessor | Set 1
1. A microprocessor is a _______ chip integrating all the functions of a CPU of a computer.
A. multiple
B. single
C. double
D. triple
Correct : B. single
2. Microprocessor is a/an _______ circuit that functions as the CPU of the compute
A. electronic
B. mechanic
C. integrating
D. processing
Correct : A. electronic
3. Microprocessor is the ______ of the computer and it perform all the computational tasks
A. main
B. heart
C. important
D. simple
Correct : B. heart
4. The purpose of the microprocessor is to control ______
A. memory
B. switches
C. processing
D. tasks
Correct : A. memory
5. The first digital electronic computer was built in the year________
A. 1950
B. 1960
C. 1940
D. 1930
Correct : C. 1940
6. In 1960's texas institute invented ______
A. integrated circuits
B. microprocessor
C. vacuum tubes
D. transistors
Correct : A. integrated circuits
7. The intel 8086 microprocessor is a _______ processor
A. 8 bit
B. 16 bit
C. 32 bit
D. 4 bit
Correct : B. 16 bit
8. The microprocessor can read/write 16 bit data from or to ________
A. memory
B. i /o device
C. processor
D. register
Correct : A. memory
9. The work of EU is ________
A. encoding
B. decoding
C. processing
D. calculations
Correct : B. decoding
10. The 16 bit flag of 8086 microprocessor is responsible to indicate ___________
A. the condition of result of alu operation
B. the condition of memory
C. the result of addition
D. the result of subtraction
Correct : A. the condition of result of alu operation
11. The CF is known as ________
A. carry flag
B. condition flag
C. common flag
D. single flag
Correct : A. carry flag
12. The SF is called as ________
A. service flag
B. sign flag
C. single flag
D. condition flag
Correct : B. sign flag
13. The OF is called as _______
A. overflow flag
B. overdue flag
C. one flag
D. over flag
Correct : A. overflow flag
14. The IF is called as _________
A. initial flag
B. indicate flag
C. interrupt flag
D. inter flag
Correct : C. interrupt flag
15. The register AX is formed by grouping ________
A. ah & al
B. bh & bl
C. ch & cl
D. dh & dl
Correct : A. ah & al
16. The SP is indicated by ________
A. single pointer
B. stack pointer
C. source pointer
D. destination pointer
Correct : B. stack pointer
17. The BP is indicated by _______
A. base pointer
B. binary pointer
C. bit pointer
D. digital pointer
Correct : A. base pointer
18. The SS is called as ________
A. single stack
B. stack segment
C. sequence stack
D. random stack
Correct : B. stack segment
19. The index register are used to hold _______
A. memory register
B. offset address
C. segment memory
D. offset memory
Correct : B. offset address
20. The BIU contains FIFO register of size __________ bytes
A. 8
B. 6
C. 4
D. 12
Correct : B. 6
21. The BIU prefetches the instruction from memory and store them in ________
A. queue
B. register
C. memory
D. stack
Correct : A. queue
22. The 1 MB byte of memory can be divided into ______ segment
A. 1 kbyte
B. 64 kbyte
C. 33 kbyte
D. 34 kbyte
Correct : B. 64 kbyte
23. The DS is called as _______
A. data segment
B. digital segment
C. divide segment
D. decode segment
Correct : A. data segment
24. The CS register stores instruction _____________ in code segment
A. stream
B. path
C. codes
D. stream line
Correct : C. codes
25. The IP is ________ bits in length
A. 8 bits
B. 4 bits
C. 16 bits
D. 32 bits
Correct : C. 16 bits
26. The push source copies a word from source to ______
A. stack
B. memory
C. register
D. destination
Correct : A. stack
27. LDs copies to consecutive words from memory to register and ___________
A. es
B. ds
C. ss
D. cs
Correct : B. ds
28. INC destination increments the content of destination by _______
A. 1
B. 2
C. 30
D. 41
Correct : A. 1
29. IMUL source is a signed _________
A. multiplication
B. addition
C. subtraction
D. division
Correct : A. multiplication
30. _________destination inverts each bit of destination
A. not
B. nor
C. and
D. or
Correct : A. not
31. The JS is called as ______
A. jump the signed bit
B. jump single bit
C. jump simple bit
D. jump signal it
Correct : A. jump the signed bit
32. Instruction providing both segment base and offset address are called _____
A. below type .
B. far type
C. low type
D. high type
Correct : B. far type
33. The conditional branch instruction specify ___________ for branching
A. conditions
B. instruction
C. address
D. memory
Correct : A. conditions
34. The LES copies to words from memory to register and __________
A. ds
B. cs
C. es
D. ds
Correct : C. es
35. The _________ translates a byte from one code to another code
A. xlat
B. xchng
C. pop
D. push
Correct : A. xlat
36. The _______ contains an offset instead of actual address
A. sp
B. ip
C. es
D. ss
Correct : B. ip
37. The 8086 fetches instruction one after another from __________ of memory
A. code segment
B. ip
C. es
D. ss
Correct : A. code segment
38. The BIU contains FIFO register of size 6 bytes called _____.
A. queue
B. stack
C. segment
D. register
Correct : A. queue
39. Signal
A. ur signal
B. vcc
C. aie
D. ground
Correct : A. ur signal
40. The pin of minimum mode AD0-AD15 has ____________ address
A. 16 bit
B. 20 bit
C. 32 bit
D. 4 bit
Correct : B. 20 bit
41. The pin of minimum mode AD0- AD15 has _________ data bus
A. 4 bit
B. 20 bit
C. 16 bit
D. 32 bit
Correct : C. 16 bit
42. The address bits are sent out on lines through __________
A. a16-19
B. a0-17
C. d0-d17
D. c0-c17
Correct : A. a16-19
43. ________ is used to write into memory
A. rd
B. wr
C. rd / wr
D. clk
Correct : B. wr
44. The functions of Pins from 24 to 31 depend on the mode in which _______ is operating
A. 8085
B. 8086
C. 80835
D. 80845
Correct : B. 8086
45. The RD, WR, M/IO is the heart of control for a __________ mode
A. minimum
B. maximum
C. compatibility mode
D. control mode
Correct : A. minimum
46. In a minimum mode there is a ___________ on the system bus
A. single
B. double
C. multiple
D. triple
Correct : A. single
47. If MN/MX is low the 8086 operates in __________ mode
A. minimum
B. maximum
C. both (a) and (b)
D. medium
Correct : B. maximum
48. In max mode, control bus signal So,S1 and S2 are sent out in ____________ form
A. decoded
B. encoded
C. shared
D. unshared
Correct : B. encoded
49. The ___ bus controller device decodes the signals to produce the control bus signal
A. internal
B. data
C. external
D. address
Correct : C. external
50. interrupted program
A. forward
B. return
C. data
D. line
Correct : B. return
51. The main concerns of the ___________ are to define a flexible set of commands
A. memory interface
B. peripheral interface
C. both (a) and (b)
D. control interface
Correct : A. memory interface
52. and write into register
A. multiprocessor
B. microprocessor
C. dual processor
D. coprocessor
Correct : B. microprocessor
53. To perform any operations, the Mp should identify the __________
A. register
B. memory
C. interface
D. system
Correct : A. register
54. The Microprocessor places __________ address on the address bus
A. 4 bit
B. 8 bit
C. 16 bit
D. 32 bit
Correct : C. 16 bit
55. register should be selected
A. address
B. one
C. two
D. three
Correct : B. one
56. The ________of the memory chip will identify and select the register for the EPROM
A. internal decoder
B. external decoder
C. address decoder
D. data decoder
Correct : A. internal decoder
57. Microprocessor provides signal like ____ to indicate the read operatio
A. low
B. mcmw
C. mcmr
D. mcmwr
Correct : C. mcmr
58. must be added to address lines of the _______ chip.
A. single
B. memory
C. multiple
D. triple
Correct : B. memory
59. The remaining address line of ______ bus is decoded to generate chip select signal
A. data
B. address
C. control bus
D. both (a) and (b)
Correct : B. address
60. _______ signal is generated by combining RD and WR signals with IO/M
A. control
B. memory
C. register
D. system
Correct : A. control
61. Memory is an integral part of a _______ system
A. supercomputer
B. microcomputer
C. mini computer
D. mainframe computer
Correct : B. microcomputer
62. _____ has certain signal requirements write into and read from its registers
A. memory
B. register
C. both (a) and (b)
D. control
Correct : A. memory
63. An _________ is used to fetch one address
A. internal decoder
B. external decoder
C. encoder
D. register
Correct : A. internal decoder
64. The primary function of the _____________ is to accept data from I/P devices
A. multiprocessor
B. microprocessor
C. peripherals
D. interfaces
Correct : B. microprocessor
65. ___________ signal prevent the microprocessor from reading the same data more than one
A. pipelining
B. handshaking
C. controlling
D. signaling
Correct : B. handshaking
66. Bits in IRR interrupt are ______
A. reset
B. set
C. stop
D. start
Correct : B. set
67. __________ generate interrupt signal to microprocessor and receive acknowledge
A. priority resolver
B. control logic
C. interrupt request register
D. interrupt register
Correct : B. control logic
68. The _______ pin is used to select direct command word
A. a0
B. d7-d6
C. a12
D. ad7-ad6
Correct : A. a0
69. The _______ is used to connect more microprocessor
A. peripheral device
B. cascade
C. i/o devices
D. control unit
Correct : B. cascade
70. CS connect the output of ______
A. encoder
B. decoder
C. slave program
D. buffer
Correct : B. decoder
71. In which year, 8086 was introduced?
A. 1978
B. 1979
C. 1977
D. 1981
Correct : A. 1978
72. Expansion for HMOS technology_______
A. high level mode oxygen semiconductor
B. high level metal oxygen semiconductor
C. high performance medium oxide semiconductor
D. high performance metal oxide semiconductor
Correct : D. high performance metal oxide semiconductor
73. 8086 and 8088 contains _______ transistors
A. 29000
B. 24000
C. 34000
D. 54000
Correct : A. 29000
74. ALE stands for ___________
A. address latch enable
B. address level enable
C. address leak enable
D. address leak extension
Correct : A. address latch enable
75. What is DEN?
A. direct enable
B. data entered
C. data enable
D. data encoding
Correct : C. data enable
76. In 8086, Example for Non maskable interrupts are ________.
A. trap
B. rst6.5
C. intr
D. rst6.6
Correct : A. trap
77. In 8086 the overflow flag is set when _____________.
A. the sum is more than 16 bits.
B. signed numbers go out of their range after an arithmetic operation.
C. carry and sign flags are set.
D. subtraction
Correct : B. signed numbers go out of their range after an arithmetic operation.
78. In 8086 microprocessor the following has the highest priority among all type interrupts?
A. nmi
B. div 0
C. type 255
D. over flow
Correct : A. nmi
79. In 8086 microprocessor one of the following statements is not true?
A. coprocessor is interfaced in max mode.
B. coprocessor is interfaced in min mode.
C. i /o can be interfaced in max / min mode.
D. supports pipelining
Correct : B. coprocessor is interfaced in min mode.
80. Address line for TRAP is?
A. 0023h
B. 0024h
C. 0033h
D. 0099h
Correct : B. 0024h
81. Access time is faster for _________.
A. rom
B. sram
C. dram
D. eram
Correct : B. sram
82. The First Microprocessor was__________.
A. intel 4004
B. 8080
C. 8085
D. 4008
Correct : A. intel 4004
83. Status register is also called as ___________.
A. accumulator
B. stack
C. counter
D. flags
Correct : D. flags
84. Which of the following is not a basic element within the microprocessor?
A. microcontroller
B. arithmetic logic unit (alu)
C. register array
D. control unit
Correct : A. microcontroller
85. Which method bypasses the CPU for certain types of data transfer?
A. software interrupts
B. interrupt-driven i/o
C. polled i/o
D. direct memory access (dma)
Correct : D. direct memory access (dma)
86. The first microprocessor had a(n)________.
A. 1 – bit data bus
B. 2 – bit data bus
C. 4 – bit data bus
D. 8 – bit data bus
Correct : C. 4 – bit data bus
87. Which microprocessor has multiplexed data and address lines?
A. 8086
B. 80286
C. 80386
D. pentium
Correct : A. 8086
88. Which is not an operand?
A. variable
B. register
C. memory location
D. assembler
Correct : D. assembler
89. A 20-bit address bus can locate ________.
A. 1,048,576 locations
B. 2,097,152 locations
C. 4,194,304 locations
D. 8,388,608 locations
Correct : A. 1,048,576 locations
90. Which of the following is not an arithmetic instruction?
A. inc (increment)
B. cmp (compare)
C. dec (decrement)
D. rol (rotate left)
Correct : D. rol (rotate left)
91. During a read operation the CPU fetches ________.
A. a program instruction
B. another address
C. data itself
D. all of the above
Correct : D. all of the above
92. Which of the following is not an 8086/8088 general-purpose register?
A. code segment (cs)
B. data segment (ds)
C. stack segment (ss)
D. address segment (as)
Correct : D. address segment (as)
93. A 20-bit address bus allows access to a memory of capacity
A. 1 mb
B. 2 mb
C. 4 mb
D. 8 mb
Correct : A. 1 mb
94. Which microprocessor accepts the program written for 8086 without any changes?
A. 8085
B. 8086
C. 8087
D. 8088
Correct : D. 8088
95. Which group of instructions do not affect the flags?
A. arithmetic operations
B. logic operations
C. data transfer operations
D. branch operations
Correct : C. data transfer operations
96. The result of MOV AL, 65 is to store
A. store 0100 0010 in al
B. store 42h in al
C. store 40h in al
D. store 0100 0001 in al
Correct : D. store 0100 0001 in al
97. Which is not part of the execution unit (EU)?
A. arithmetic logic unit (alu)
B. clock
C. general registers
D. flags
Correct : B. clock
98. A microprocessor is a chip integrating all the functions of a CPU of a computer.
A. multiple
B. single
C. double
D. triple
Correct : B. single
99. Microprocessor is a/an circuit that functions as the CPU of the compute
A. electronic
B. mechanic
C. integrating
D. processing
Correct : A. electronic
100. Microprocessor is the of the computer and it perform all the computational tasks
A. main
B. heart
C. important
D. simple
Correct : B. heart